March 18, 2008 – 12:50 PM
Advancing its architecture at what most independent observers would now agree is a breakneck pace, Intel offered further details today on how soon it would begin phasing out the Core Microarchitecture it introduced in the summer of 2006.
With the second phase of its 45 nm generation microprocessors — what it calls “tock,” using a metaphor that drives rival AMD mad — Intel will move to a processor design that utilizes scalable cores, from two all the way to eight, it will introduce another new microarchitecture for processing instructions, and it will phase out the front-side bus as a component of its architecture. We’ve known these facts based on bits and pieces of information compiled from Intel hints over the past six months. Now we know this as absolute fact, confirmed by senior vice president Pat Gelsinger during a special presentation this morning.
Now we know when it will all happen for certain. The six-core Dunnington server CPU platform using Penryn architecture (the “tick” generation of 45 nm), with 16 MB of L3 cache, goes into production as soon as this summer. The 45 nm Nehalem architecture (“tock”) enters production in the fourth quarter of this year. That will be the beginning of the end of the era of Intel x86 computers with a front-side bus (a separate circuit linking the CPU to memory, with a dedicated clock).
Source: BetaNews
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